Technical Field
The present invention relates to a function control apparatus, an apparatus including the same, and a communication establishing method.
Description of the Related Art
In response to increasing demand for reducing power consumption in recent years, the recent information processing apparatuses are provided with arithmetic devices such as central processing units (CPUs) to control power consumption, thus stopping power supply to various units in the apparatus according to the operating state of the apparatus. For example, in response to receiving an operation request sent from another apparatus connected via a network, the information processing apparatus in a power saving state that is monitoring the network returns from the power saving state to a normal operating state.
Monitoring the network in the power saving state is performed by an application specific integrated circuit (ASIC) connected to a Peripheral Component Interconnect Express (PCIe) port of a main CPU, which controls entire information processing apparatus. This ASIC (hereinafter referred to as the “network ASIC”) has mounted thereon a sub CPU that consumes less power than the main CPU, and the network ASIC functions as a power consumption control that operates under control of the sub CPU in the power saving state.
However, some main CPUs have only a few number of PCIe ports, and, in that case, there may be no PCIe port for connecting the network ASIC. In such a case, another configuration for monitoring the network in the power saving state is known. In this configuration, the network ASIC is connected to a PCIe port of a controller ASIC connected to a PCIe port of the main CPU. The controller ASIC is a main chip that provides a particular function implemented by the information processing apparatus.
In the information processing apparatus with the foregoing configurations, setting a link width, which is necessary for establishing a PCIe link when returning from the power saving state, and suppressing power consumption has been proposed.
In the case of the above-described configuration where the network ASIC is connected to a PCIe port of the controller ASIC, when returning from the power saving state, a PCIe link is first established between the main CPU and the controller ASIC, which enables the main CPU and the controller ASIC to communicate with each other. Thereafter, under control of the main CPU, a PCIe link is established between the controller ASIC and the network ASIC, which enables the controller ASIC and the network ASIC to communicate with each other.
Thus, it takes a longer time for the configurations to be able to communicate with each other when returning from the power saving state, compared with the case where the main CPU and the network ASIC are directly connected through PCIe.